ESP32 C3 Super Mini Plus Development Board Pinout and Technical Specifications
Code name: ESP32C3_DEV
ESP32 C3 Super Mini Plus development board is based on esp32c3 microcontroller and uses riscv32 architecture. This development board has a maximum CPU frequency of 160 MHz and a flash size of 4MB.
π Quick Links
π Price
π ESP32 C3 Super Mini Plus Description
β οΈ If you have the black pcb board, check ESP32 C3 Supermini.
The ESP32-C3 SuperMini Plus is an enhanced IoT mini development board based on the Espressif ESP32-C3 WiFi/Bluetooth dual-mode chip. It shares the same core architecture as the standard SuperMini, featuring a 32-bit RISC-V CPU, 400 KB of SRAM, and 4 MB of flash memory. The board supports IEEE 802.11b/g/n WiFi and Bluetooth 5 (LE) protocols, ensuring robust connectivity.
A key difference between the two models is the antenna design. The SuperMini features a built-in small PCB antenna, whereas the SuperMini Plus comes with an external antenna that connects to the board via a U.FL connector, offering better range and signal strength for wireless applications.
The SuperMini Plus also comes in a distinct red PCB variant and features an onboard RGB LED, allowing for more flexible LED control compared to the single blue LED on the original SuperMini. This RGB LED enables users to program different colors for status indications, making it more versatile for IoT and embedded projects.
π ESP32 C3 Super Mini Plus Case / Enclosure
Looking for a case to finish up your project with ESP32 C3 Super Mini Plus? Check our π Etsy Store.
We offer a variety of enclosures for the ESP32 C3 Super Mini Plus, available in different colors and configurations β with or without header pins, and more! You can also choose between a hexagon-patterned lid for improved heat dispersion βοΈ or a solid lid for a sleek finish.
On our π Etsy Store, you can find cases for different ESP32 development boards, the ESP32 boards with senors, screens, etc. The stock is always filling up! π¦
Need a custom case? βοΈ Contact Us on Etsy Store or our Contact Form
π ESP32 C3 Super Mini Plus Specs
Below you can find the specifications of ESP32 C3 Super Mini Plus, such as features, connectivity options, and ESP32 C3 Super Mini Plus technical specs.
β¨ Features
- Red PCB variant
- Ultra-low power consumption: deep sleep power consumption of about 43ΞΌA
- Onboard RGB LED for multi-color status indication
- 11 digital IO pins
- 22 external interrupt pins
- 6 analog input pins
- 11 PWM pins
π°οΈ Connectivity
- WiFi: 802.11 b/g/n (2.4 GHz)
- Bluetooth: 5.0
- WiFi: 5.0
π Technical specs
| Clock Speed | 160 MHz |
| Flash size | 4MB |
| Microcontroller | esp32c3 |
| Architecture | riscv32 |
π ESP32 C3 Super Mini Plus Pinout
The ESP32-C3 Super Mini Plus pinout is the same as ESP32 C3 Super Mini.
The ESP32-C3 Super Mini Plus pinout retains the compact yet versatile layout of its predecessor. Key power pins such as 5V, 3.3V, and GND ensure stable power delivery for various peripherals. The board supports communication protocols with dedicated RX and TX for UART, SDA and SCL for I2C, and MISO, MOSI, SCK, and SS for SPI interfaces.
The ESP32-C3 SuperMini Plus expands its capabilities with an onboard RGB LED, replacing the single blue LED of the original SuperMini, allowing users to control various colors programmatically.
Additionally, the board retains 11 digital GPIOs (PWM-capable) and 4 analog I/Os (ADC-capable), making it ideal for diverse IoT applications.
β οΈ Pins to Avoid or Use with Caution
Some pins are reserved for critical functions like bootstrapping, JTAG debugging, USB communication, and flash memory operations. Misusing these pins may lead to boot failures, programming issues, USB conflicts, or disruptions in flash storage. Below is a list of pins to avoid or use with caution, categorized for clarity:
- π οΈ Strapping Pins (Boot Mode & System Behavior) - These pins control boot behavior and flash voltage selection. Pulling them high or low at reset can impact boot mode selection, voltage settings, or debugging access. Avoid altering their state unless necessary.
- π JTAG Debugging Pins - JTAG is used for low-level debugging and programming. If JTAG is enabled, these pins must remain dedicated to it. Repurposing them as GPIO can disable JTAG debugging features.
- π USB Communication Pins - These pins are used for USB Serial/JTAG communication. If USB debugging or communication is required, they should not be reassigned as GPIO.
- β‘ Flash Memory & SPI Pins - Certain GPIOs are hardwired to SPI flash memory and PSRAM. Using them as standard GPIOs may result in system instability, corrupted storage, or boot failure.
- π‘ UART Serial Communication Pins - By default, these pins are used for serial debugging, console output, and firmware uploads. Repurposing them for general I/O may break UART programming or debugging capabilities.
| PIN | Label | Reason | Function |
|---|---|---|---|
| IO2 | GPIO2 | Must be held high during boot (if low on reset, normal flash boot may fail) | π οΈ Strapping |
| IO4 | MTMS | Used during boot; JTAG TMS for debugging; acts as Quad-SPI flash IO (hold data line) in internal-flash variants | π JTAG |
| IO5 | MTDI | Used during boot; JTAG TDI for debugging; acts as Quad-SPI flash IO (write-protect data line) in internal-flash variants | π JTAG |
| IO6 | MTCK | Used during boot; JTAG TCK for debugging; provides flash clock in internal-flash variants | π JTAG |
| IO7 | MTDO | Used during boot; JTAG TDO for debugging; acts as Quad-SPI flash IO (data line) in internal-flash variants | π JTAG |
| IO8 | GPIO8 | Must be held high during reset (if low, UART flashing/boot may not work) | π οΈ Strapping |
| IO9 | GPIO9 | Controls boot mode on reset (HIGH for normal flash boot, LOW enters serial download mode) | π οΈ Strapping |
| IO21 | U0TXD | Used as UART0 transmit (console/bootloader); repurposing may disable serial console output and printing | π‘ UART |
| IO20 | U0RXD | Used as UART0 receive (console/bootloader); repurposing may disable serial programming and debug logs | π‘ UART |
π Key Takeaway:
- Before using any GPIO, check if it is assigned a critical function.
- Avoid using bootstrapping pins unless you're modifying boot behavior intentionally.
- If JTAG debugging is needed, ensure its pins remain free.
- USB and Flash-related GPIOs should remain dedicated unless you disable their default functions.
β Pins Safe to use
- πΉ IO0
- πΉ IO1
- πΉ IO3
- πΉ IO10
Unlike restricted pins, these GPIOs are not tied to essential system functions like π οΈ bootstrapping, π USB communication, π JTAG debugging, or β‘ SPI flash memory, making them the best choices for custom applications and general use.
Why Are These Pins Safe?- Not involved in bootstrapping β These GPIOs do not affect the deviceβs boot mode or system startup.
- Not linked to flash memory or PSRAM β They wonβt interfere with storage or memory access.
- Not dedicated to USB or JTAG β They remain free for general use without affecting debugging or programming.
- No special hardware connections β Unlike some pins that are internally wired to system functions, these remain freely assignable.
πΊοΈ ESP32 C3 Super Mini Plus External Pins Mapping Functions
Below you can find the ESP32 C3 Super Mini Plus pinout. This development board provides 11 digital IO pins, out of which 22 can be used as an external interrupt pins , 6 as analog input pins and 11 pins have Pulse-Width Modulation (PWM) .
| Pin | Function | ESP Pin | Input/Output | Description |
|---|---|---|---|---|
| 1 | 5V | 5V | POWER INPUT | 5V power input for the board |
| 2 | GND | GND | POWER GROUNT | Ground connection |
| 3 | 3V3 | 3.3V | POWER OUTPUT | 3.3V power output |
| 4 | IO0 | A0 | BIDIRECTIONAL | GPIO, ADC pin, PWM |
| 5 | IO1 | A1 | BIDIRECTIONAL | GPIO, ADC pin, PWM |
| 6 | IO2 | A2 | BIDIRECTIONAL | GPIO, ADC pin, PWM |
| 7 | IO3 | A3 | BIDIRECTIONAL | GPIO, ADC pin, PWM |
| 8 | IO4 | A4 | BIDIRECTIONAL | GPIO, ADC pin, SCK, PWM |
| 9 | IO5 | A5 | BIDIRECTIONAL | GPIO, ADC pin, SPI Master In Slave Out, PWM |
| 10 | IO6 | MISO | BIDIRECTIONAL | GPIO, SPI Master Out Slave In, PWM |
| 11 | IO7 | SS | BIDIRECTIONAL | GPIO, SPI Slave Select, PWM |
| 12 | IO8 | SDA | BIDIRECTIONAL | GPIO, I2C Data line, PWM |
| 13 | IO9 | SCL | BIDIRECTIONAL | GPIO, I2C Clock line, PWM |
| 14 | IO10 | RX | BIDIRECTIONAL | GPIO, PWM |
| 15 | IO21 | TX | BIDIRECTIONAL | GPIO, UART Transmit |
| 16 | IO20 | RX | BIDIRECTIONAL | GPIO, UART Receive (secondary) |
πΊοΈ ESP32 C3 Super Mini Plus Pins Mapping Arduino IDE
Below you can find the ESP32 C3 Super Mini Plus pinout. This development board provides 11 digital IO pins, out of which 22 can be used as an external interrupt pins , 6 as analog input pins and 11 pins have Pulse-Width Modulation (PWM) .
| Pin | Analog | Touch | PWM | Other |
|---|---|---|---|---|
| 0 | A0 | |||
| 1 | A1 | |||
| 2 | A2 | |||
| 3 | A3 | |||
| 4 | A4 | SCK | ||
| 5 | A5 | MISO | ||
| 6 | MOSI | |||
| 7 | SS | |||
| 8 | RGB_BUILTIN SDA | |||
| 9 | SCL | |||
| 20 | RX | |||
| 21 | TX |
π οΈ Default Tools
| Bootloader tool | esptool_py |
| Uploader tool | esptool_py |
| Network uploader tool | esp_ota |
| Bootloader address | 0x0 |
| Flash mode | qio |
| Boot mode | qio |
| PSRAM type | |
| Maximum upload size | 1280 Kb (1310720 B) |
| Maximum data size | 320 Kb (327680 B) |
The ESP32 C3 Super Mini Plus development board by default uses esptool_py uploader tool, esp_ota network uploader tool for Over-the-air (OTA) uploads and esptool_py bootloader tool. The bootloader starts at address "0x0". Flash mode and boot mode for ESP32 C3 Super Mini Plus development board by default is qio and qio respectively.
