ESP32-C3-Zero Pro Development Board Pinout and Technical Specifications
Code name: ESP32C3_DEV
ESP32-C3-Zero Pro development board is based on esp32c3 microcontroller and uses riscv32 architecture. This development board has a maximum CPU frequency of 160 MHz and a flash size of 4MB.
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π ESP32-C3-Zero Pro Description
ESP32-C3-Zero Pro is an upgraded version of the ESP32-C3-Zero, featuring a better ceramic antenna and an IPEX antenna mount for improved wireless performance. It is based on the Espressif ESP32-C3 Wi-Fi/Bluetooth dual-mode chip, with a 32-bit RISC-V single-core processor running at up to 160 MHz. It comes with 400 KB SRAM, 384 KB ROM, and 4 MB of onboard flash memory.
This board supports 2.4 GHz Wi-Fi (802.11 b/g/n) and Bluetooth 5 (LE), making it ideal for low-power IoT applications and wireless wearable devices. πΆ
Compared to the ESP32-C3-Zero, the Zero Pro offers enhanced signal strength due to its dual-antenna design, making it more reliable for applications requiring strong wireless connectivity. It retains the same ultra-compact footprint (22.52 Γ 18 mm) while adding more connectivity options.
For user convenience, it includes both a RESET button and a BOOT button to facilitate development and debugging. π
The board provides 11 digital I/O pins configurable as PWM outputs and 4 analog I/O pins for ADC inputs. It supports multiple serial interfaces, including 1Γ I2C, 1Γ SPI, and 2Γ UART, ensuring compatibility with a wide range of peripherals. βοΈ
π ESP32-C3-Zero Pro Specs
Below you can find the specifications of ESP32-C3-Zero Pro, such as features, connectivity options, and ESP32-C3-Zero Pro technical specs.
β¨ Features
- Improved wireless performance: Better ceramic antenna + IPEX antenna mount
- Ultra-small size: 22.52 Γ 18 mm
- Ultra-low power consumption: deep sleep current approximately 43 ΞΌA
- Onboard blue LED connected to GPIO8
- 11 digital IO pins
- 22 external interrupt pins
- 4 analog input pins
- 11 PWM pins
π°οΈ Connectivity
- WiFi: 802.11 b/g/n (2.4 GHz)
- Bluetooth: 5.0
- BLE: 5.0
π Technical specs
| Microcontroller | esp32c3 |
| Clock Speed | 160 MHz |
| Flash size | 4MB |
| Architecture | riscv32 |
π ESP32-C3-Zero Pro Pinout
The ESP32-C3-Zero Pro pinout is designed for versatility in a compact form factor. Key power pins include 5V, 3.3V, and GND, ensuring stable power delivery for various peripherals.
The board provides multiple communication interfaces:
- UART: TX, RX
- I2C: SDA, SCL
- SPI: SCK, MISO, MOSI, SS
For analog input, it offers ADC pins suitable for reading sensor data or voltage levels.
β οΈ Pins to Avoid or Use with Caution
Some pins are reserved for critical functions like bootstrapping, JTAG debugging, USB communication, and flash memory operations. Misusing these pins may lead to boot failures, programming issues, USB conflicts, or disruptions in flash storage. Below is a list of pins to avoid or use with caution, categorized for clarity:
- π οΈ Strapping Pins (Boot Mode & System Behavior) - These pins control boot behavior and flash voltage selection. Pulling them high or low at reset can impact boot mode selection, voltage settings, or debugging access. Avoid altering their state unless necessary.
- π JTAG Debugging Pins - JTAG is used for low-level debugging and programming. If JTAG is enabled, these pins must remain dedicated to it. Repurposing them as GPIO can disable JTAG debugging features.
- π USB Communication Pins - These pins are used for USB Serial/JTAG communication. If USB debugging or communication is required, they should not be reassigned as GPIO.
- β‘ Flash Memory & SPI Pins - Certain GPIOs are hardwired to SPI flash memory and PSRAM. Using them as standard GPIOs may result in system instability, corrupted storage, or boot failure.
- π‘ UART Serial Communication Pins - By default, these pins are used for serial debugging, console output, and firmware uploads. Repurposing them for general I/O may break UART programming or debugging capabilities.
| PIN | Label | Reason | Function |
|---|---|---|---|
| IO2 | GPIO2 | Must be held high during boot (if low on reset, normal flash boot may fail) | π οΈ Strapping |
| IO4 | MTMS | Used during boot; JTAG TMS for debugging; acts as Quad-SPI flash IO (hold data line) in internal-flash variants | π JTAG |
| IO5 | MTDI | Used during boot; JTAG TDI for debugging; acts as Quad-SPI flash IO (write-protect data line) in internal-flash variants | π JTAG |
| IO6 | MTCK | Used during boot; JTAG TCK for debugging; provides flash clock in internal-flash variants | π JTAG |
| IO7 | MTDO | Used during boot; JTAG TDO for debugging; acts as Quad-SPI flash IO (data line) in internal-flash variants | π JTAG |
| IO8 | GPIO8 | Must be held high during reset (if low, UART flashing/boot may not work) | π οΈ Strapping |
| IO9 | GPIO9 | Controls boot mode on reset (HIGH for normal flash boot, LOW enters serial download mode) | π οΈ Strapping |
| IO20 | U0RXD | Used as UART0 receive (console/bootloader); repurposing may disable serial programming and debug logs | π‘ UART |
| IO21 | U0TXD | Used as UART0 transmit (console/bootloader); repurposing may disable serial console output and printing | π‘ UART |
π Key Takeaway:
- Before using any GPIO, check if it is assigned a critical function.
- Avoid using bootstrapping pins unless you're modifying boot behavior intentionally.
- If JTAG debugging is needed, ensure its pins remain free.
- USB and Flash-related GPIOs should remain dedicated unless you disable their default functions.
β Pins Safe to use
- πΉ IO0
- πΉ IO1
- πΉ IO3
- πΉ IO10
Unlike restricted pins, these GPIOs are not tied to essential system functions like π οΈ bootstrapping, π USB communication, π JTAG debugging, or β‘ SPI flash memory, making them the best choices for custom applications and general use.
Why Are These Pins Safe?- Not involved in bootstrapping β These GPIOs do not affect the deviceβs boot mode or system startup.
- Not linked to flash memory or PSRAM β They wonβt interfere with storage or memory access.
- Not dedicated to USB or JTAG β They remain free for general use without affecting debugging or programming.
- No special hardware connections β Unlike some pins that are internally wired to system functions, these remain freely assignable.
πΊοΈ ESP32-C3-Zero Pro External Pins Mapping Functions
Below you can find the ESP32-C3-Zero Pro pinout. This development board provides 11 digital IO pins, out of which 22 can be used as an external interrupt pins , 4 as analog input pins and 11 pins have Pulse-Width Modulation (PWM) .
| Pin | Function | ESP Pin | Input/Output | Description |
|---|---|---|---|---|
| 1 | 5V | 5V | POWER INPUT | 5V power input for the board |
| 2 | GND | GND | POWER GROUND | Ground connection |
| 3 | 3V3 | 3.3V | POWER OUTPUT | 3.3V power output |
| 4 | IO0 | GPIO0 | BIDIRECTIONAL | GPIO, ADC, PWM |
| 5 | IO1 | GPIO1 | BIDIRECTIONAL | GPIO, ADC, PWM |
| 6 | IO2 | GPIO2 | BIDIRECTIONAL | GPIO, ADC, PWM |
| 7 | IO3 | GPIO3 | BIDIRECTIONAL | GPIO, ADC, PWM |
| 8 | IO4 | GPIO4 | BIDIRECTIONAL | GPIO, ADC, SPI SCK, PWM |
| 9 | IO5 | GPIO5 | BIDIRECTIONAL | GPIO, ADC, SPI MISO, PWM |
| 10 | IO6 | GPIO6 | BIDIRECTIONAL | GPIO, SPI MOSI, PWM |
| 11 | IO7 | GPIO7 | BIDIRECTIONAL | GPIO, SPI SS, PWM |
| 12 | IO8 | GPIO8 | BIDIRECTIONAL | GPIO, I2C Data line, PWM |
| 13 | IO9 | GPIO9 | BIDIRECTIONAL | GPIO, I2C Clock line, PWM |
| 14 | IO10 | GPIO10 | BIDIRECTIONAL | GPIO |
| 15 | IO20 | TX | BIDIRECTIONAL | GPIO, UART Transmit |
| 16 | IO21 | TX | BIDIRECTIONAL | GPIO, UART Transmit |
π οΈ Default Tools
| Bootloader tool | esptool_py |
| Uploader tool | esptool_py |
| Network uploader tool | esp_ota |
| Bootloader address | 0x0 |
| Flash mode | qio |
| Boot mode | qio |
| PSRAM type | |
| Maximum upload size | 1280 Kb (1310720 B) |
| Maximum data size | 320 Kb (327680 B) |
The ESP32-C3-Zero Pro development board by default uses esptool_py uploader tool, esp_ota network uploader tool for Over-the-air (OTA) uploads and esptool_py bootloader tool. The bootloader starts at address "0x0". Flash mode and boot mode for ESP32-C3-Zero Pro development board by default is qio and qio respectively.
