ESP32-H2 Super Mini Development Board Pinout and Technical Specifications
Code name: ESP32H2_DEV
ESP32-H2 Super Mini development board is based on esp32h2 microcontroller and uses riscv32 architecture. This development board has a maximum CPU frequency of 96 MHz and a flash size of 4MB.
π Price
π ESP32-H2 Super Mini Description
The ESP32-H2 SuperMini is an ultra-low-power IoT development board based on the Espressif ESP32-H2 chip. It features a 32-bit RISC-V single-core processor running at up to 96 MHz. The board integrates IEEE 802.15.4 support, making it compatible with **Thread and Zigbee protocols** for robust mesh networking. Additionally, it includes Bluetooth Low Energy (BLE) and operates in the **2.4 GHz band** with a data rate of up to 250 Kbps. The ESP32-H2 SuperMini is designed for applications requiring **low-power consumption, RF stability, and secure wireless communication**, making it ideal for IoT, smart home, and industrial automation.
π ESP32-H2 Super Mini Specs
Below you can find the specifications of ESP32-H2 Super Mini, such as features, connectivity options, and ESP32-H2 Super Mini technical specs.
β¨ Features
- RISC-V 32-bit single-core CPU running at up to 96 MHz
- 128 KB ROM, 320 KB SRAM, 4 KB Low-Power SRAM
- 4 MB in-package flash memory
- Supports IEEE 802.15.4 (Thread and Zigbee)
- Bluetooth 5 Low Energy (BLE) support
- Operates in the 2.4 GHz band with 250 Kbps data rate
- USB Type-C interface for easy programming
- Low-power consumption for battery-operated devices
- 11 digital IO pins
- 22 external interrupt pins
- 6 analog input pins
- 11 PWM pins
π°οΈ Connectivity
- WiFi: -
- Bluetooth: 5.0
- BLE: 5.0
π Technical specs
Microcontroller | esp32h2 |
Clock Speed | 96 MHz |
Flash size | 4MB |
Architecture | riscv32 |
π ESP32-H2 Super Mini Pinout
The ESP32-H2 Super Mini pinout is optimized for low-power and wireless communication applications. It includes essential power pins such as 5V
, 3.3V
, and GND
for stable operation.
The board provides communication interfaces like RX
and TX
for UART, SDA
and SCL
for I2C, and MISO
, MOSI
, SCK
, and SS
for SPI, ensuring seamless integration with external devices.
For wireless connectivity, the ESP32-H2 SuperMini supports IEEE 802.15.4 for Thread/Zigbee and Bluetooth Low Energy (BLE), making it an excellent choice for mesh networking applications.
β οΈ Pins to Avoid or Use with Caution
Some pins are reserved for critical functions like bootstrapping, JTAG debugging, USB communication, and flash memory operations. Misusing these pins may lead to boot failures, programming issues, USB conflicts, or disruptions in flash storage. Below is a list of pins to avoid or use with caution, categorized for clarity:
- π οΈ Strapping Pins (Boot Mode & System Behavior) - These pins control boot behavior and flash voltage selection. Pulling them high or low at reset can impact boot mode selection, voltage settings, or debugging access. Avoid altering their state unless necessary.
- π JTAG Debugging Pins - JTAG is used for low-level debugging and programming. If JTAG is enabled, these pins must remain dedicated to it. Repurposing them as GPIO can disable JTAG debugging features.
- π USB Communication Pins - These pins are used for USB Serial/JTAG communication. If USB debugging or communication is required, they should not be reassigned as GPIO.
- β‘ Flash Memory & SPI Pins - Certain GPIOs are hardwired to SPI flash memory and PSRAM. Using them as standard GPIOs may result in system instability, corrupted storage, or boot failure.
- π‘ UART Serial Communication Pins - By default, these pins are used for serial debugging, console output, and firmware uploads. Repurposing them for general I/O may break UART programming or debugging capabilities.
PIN | Label | Reason | Function |
---|---|---|---|
IO0 | GPIO0 | Connected to the external (or in-package) flash memory as a data line; cannot be repurposed without interfering with program storage. | β‘ Flash |
IO1 | GPIO1 | Used to select the SPI flash chip (not brought out on modules with in-package flash); needed for flash access, so it should not be used as a general IO. | β‘ Flash |
IO2 | MTMS | Serves as the flash memoryβs write-protect pin and the JTAG TMS line; using it as GPIO can disrupt flash operation or JTAG debugging. | β‘ Flash |
IO3 | MTDO | Serves as the flash HOLD (D3) line and the JTAG TDO output; repurposing it can interfere with flash reads/writes or JTAG debugging. | β‘ Flash |
IO4 | MTCK | Acts as the SPI flash clock line and the JTAG clock; cannot be used as GPIO without halting flash operation or debug capability. | β‘ Flash |
IO5 | MTDI | Functions as the flash data input (D0) line and JTAG TDI input; using it as GPIO will interfere with the flash data bus and JTAG functionality. | β‘ Flash |
IO8 | GPIO8 | Must be held at the proper logic level on reset to select the correct boot mode and enable/disable bootloader log output. | π οΈ Strapping |
IO9 | GPIO9 | Must be pulled high on reset for normal SPI flash boot (pulling it low while GPIO8 is high forces the chip into download/programming mode). | π οΈ Strapping |
IO23 | U0RXD | Often used for the serial console and bootloader input; repurposing it may conflict with UART communication for programming or debugging. | π‘ UART |
IO25 | GPIO25 | Used during boot to determine the JTAG interface source; this pin has no internal pull-up/down, so it must not be left floating (an external resistor drives it high/low to avoid unintended JTAG mode selection). | π οΈ Strapping |
IO26 | USB_D- | By default, this pin is connected to the chipβs internal USB Serial/JTAG peripheral; using it as a general-purpose IO requires disabling or reconfiguring that USB interface. | π USB |
IO27 | USB_D+ | By default, this pin is connected to the internal USB Serial/JTAG controller; using it as a general-purpose IO would disable the USB functionality used for debugging/programming. | π USB |
π Key Takeaway:
- Before using any GPIO, check if it is assigned a critical function.
- Avoid using bootstrapping pins unless you're modifying boot behavior intentionally.
- If JTAG debugging is needed, ensure its pins remain free.
- USB and Flash-related GPIOs should remain dedicated unless you disable their default functions.
β Pins Safe to use
- πΉ IO10
- πΉ IO11
- πΉ IO12
- πΉ IO13
- πΉ IO14
- πΉ IO22
Unlike restricted pins, these GPIOs are not tied to essential system functions like π οΈ bootstrapping, π USB communication, π JTAG debugging, or β‘ SPI flash memory, making them the best choices for custom applications and general use.
Why Are These Pins Safe?- Not involved in bootstrapping β These GPIOs do not affect the deviceβs boot mode or system startup.
- Not linked to flash memory or PSRAM β They wonβt interfere with storage or memory access.
- Not dedicated to USB or JTAG β They remain free for general use without affecting debugging or programming.
- No special hardware connections β Unlike some pins that are internally wired to system functions, these remain freely assignable.
πΊοΈ ESP32-H2 Super Mini External Pins Mapping Functions
Below you can find the ESP32-H2 Super Mini pinout. This development board provides 11 digital IO pins, out of which 22 can be used as an external interrupt pins , 6 as analog input pins and 11 pins have Pulse-Width Modulation (PWM) .
Pin | Function | ESP Pin | Input/Output | Description |
---|---|---|---|---|
1 | 5V | 5V | power input | 5V power input for the board |
2 | GND | GND | power ground | Ground connection |
3 | 3V3 | 3.3V | power output | 3.3V power output for peripherals |
4 | IO0 | GP0 | bidirectional | GPIO |
5 | IO1 | GP1 | bidirectional | GPIO, ADC pin |
6 | IO2 | GP2 | bidirectional | GPIO, ADC pin |
7 | IO3 | GP3 | bidirectional | GPIO, ADC pin |
8 | IO4 | GP4 | bidirectional | GPIO, ADC pin |
9 | IO5 | GP5 | bidirectional | GPIO, ADC pin |
12 | IO8 | GP8 | bidirectional | GPIO, LOG |
13 | IO9 | GP9 | bidirectional | GPIO, BOOT |
14 | IO10 | GP10 | bidirectional | GPIO |
15 | IO11 | GP11 | bidirectional | GPIO |
16 | IO12 | GP12 | bidirectional | GPIO |
17 | IO13 | GP13 | bidirectional | GPIO, LED |
18 | IO14 | GP14 | bidirectional | GPIO |
19 | IO22 | GP2 | bidirectional | GPIO |
20 | IO23 | GP23 | bidirectional | GPIO |
22 | IO25 | GP25 | bidirectional | GPIO |
23 | IO26 | GP26 | bidirectional | GPIO |
24 | IO27 | GP27 | bidirectional | GPIO |
πΊοΈ ESP32-H2 Super Mini Pins Mapping Arduino IDE
Below you can find the ESP32-H2 Super Mini pinout. This development board provides 11 digital IO pins, out of which 22 can be used as an external interrupt pins , 6 as analog input pins and 11 pins have Pulse-Width Modulation (PWM) .
Pin | Analog | Touch | PWM | Other |
---|---|---|---|---|
0 | A0 | |||
1 | A1 | |||
2 | A2 | |||
3 | A3 | |||
4 | A4 | SCK | ||
5 | A5 | MISO | ||
6 | MOSI | |||
7 | SS | |||
8 | SDA | |||
9 | SCL | |||
20 | RX | |||
21 | TX |
π οΈ Default Tools
Bootloader tool | esptool_py |
Uploader tool | esptool_py |
Network uploader tool | esp_ota |
Bootloader address | 0x0 |
Flash mode | qio |
Boot mode | qio |
PSRAM type | |
Maximum upload size | 1024 Kb (1048576 B) |
Maximum data size | 256 Kb (262144 B) |
The ESP32-H2 Super Mini development board by default uses esptool_py uploader tool, esp_ota network uploader tool for Over-the-air (OTA) uploads and esptool_py bootloader tool. The bootloader starts at address "0x0". Flash mode and boot mode for ESP32-H2 Super Mini development board by default is qio and qio respectively.