ESP32-S3-Zero Development Board Pinout and Technical Specifications
Code name: ESP32S3_DEV
ESP32-S3-Zero development board is based on esp32s3 microcontroller and uses xtensa architecture. This development board has a maximum CPU frequency of 240 MHz and a flash size of 4MB.
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📝 ESP32-S3-Zero Description
The ESP32-S3-Zero is a compact development board featuring the Espressif ESP32-S3FH4R2 dual-core processor, operating at up to 240MHz. It offers 2.4GHz Wi-Fi (802.11 b/g/n) and Bluetooth 5 (LE) capabilities, making it ideal for IoT projects requiring robust wireless connectivity. 📶
With its small form factor of 23.5 × 18 mm, the board is designed for easy integration into space-constrained applications. The onboard ceramic antenna ensures stable wireless performance without the need for an external antenna.
For user convenience, the ESP32-S3-Zero includes both a BOOT button and a RESET button, facilitating straightforward development and debugging processes. 🚀
Equipped with 24 multifunctional GPIO pins, the board supports various interfaces, including:
- 4 × SPI
- 2 × I2C
- 3 × UART
- 2 × I2S
- 2 × ADC
📊 ESP32-S3-Zero Specs
Below you can find the specifications of ESP32-S3-Zero, such as features, connectivity options, and ESP32-S3-Zero technical specs.
✨ Features
- Ultra-compact size: 23.5 × 18 mm
- Low power consumption: supports various power modes for energy-efficient applications
- Onboard WS2812 RGB LED connected to GPIO21
- 24 digital IO pins
- 24 external interrupt pins
- 2 analog input pins
- 24 PWM pins
🛰️ Connectivity
- WiFi: 802.11 b/g/n (2.4 GHz)
- Bluetooth: 5.0
- BLE: 5.0
📐 Technical specs
| Microcontroller | esp32s3 |
| Clock Speed | 240 MHz |
| Flash size | 4MB |
| Architecture | xtensa |
🔌 ESP32-S3-Zero Pinout
The ESP32-S3-Zero pinout is engineered for versatility within a compact footprint. Key power pins include 5V, 3.3V, and GND, ensuring reliable power delivery for various peripherals.
The board offers multiple communication interfaces:
- UART: TX (GPIO43), RX (GPIO44)
- I2C: SDA, SCL
- SPI: SCK, MISO, MOSI, SS
For analog input, it provides ADC pins suitable for reading sensor data or voltage levels.
⚠️ Pins to Avoid or Use with Caution
Some pins are reserved for critical functions like bootstrapping, JTAG debugging, USB communication, and flash memory operations. Misusing these pins may lead to boot failures, programming issues, USB conflicts, or disruptions in flash storage. Below is a list of pins to avoid or use with caution, categorized for clarity:
- 🛠️ Strapping Pins (Boot Mode & System Behavior) - These pins control boot behavior and flash voltage selection. Pulling them high or low at reset can impact boot mode selection, voltage settings, or debugging access. Avoid altering their state unless necessary.
- 🔗 JTAG Debugging Pins - JTAG is used for low-level debugging and programming. If JTAG is enabled, these pins must remain dedicated to it. Repurposing them as GPIO can disable JTAG debugging features.
- 🔌 USB Communication Pins - These pins are used for USB Serial/JTAG communication. If USB debugging or communication is required, they should not be reassigned as GPIO.
- ⚡ Flash Memory & SPI Pins - Certain GPIOs are hardwired to SPI flash memory and PSRAM. Using them as standard GPIOs may result in system instability, corrupted storage, or boot failure.
- 📡 UART Serial Communication Pins - By default, these pins are used for serial debugging, console output, and firmware uploads. Repurposing them for general I/O may break UART programming or debugging capabilities.
| PIN | Label | Reason | Function |
|---|---|---|---|
| IO3 | GPIO3 | Sampled at reset to select JTAG interface (USB Serial/JTAG controller vs. external pins). Improper use can disable external JTAG or alter debug interface. | 🛠️ Strapping |
| IO9 | FSPIHD | Connected to external flash (data/hold signal) on most modules. Not recommended for use as GPIO, since it must remain dedicated to flash communication. | ⚡ Flash |
| IO10 | FSPICS0 | Used to select the external flash chip. It is required for flash access and cannot be repurposed without losing flash connectivity | ⚡ Flash |
| IO11 | FSPID | Used as a data line for flash (and in-package PSRAM). It should not be used as GPIO when the flash/PSRAM is in use. | ⚡ Flash |
| IO12 | FSPICLK | Drives the flash (and PSRAM) clock. This critical signal must be reserved for memory and not used as general GPIO. | ⚡ Flash |
| IO13 | FSPIQ | Used as a data line for flash/PSRAM transfers. Not available for other uses when flash/PSRAM is connected. | ⚡ Flash |
| IO14 | FSPIWP | Connected to external flash (data/write-protect signal). Not recommended as GPIO because it’s reserved for flash operations. | ⚡ Flash |
| IO38 | FSPIWP | On flash-equipped chips, this pin is tied to the flash’s WP# (or D3) line. It should be avoided for other use, as it’s needed for flash operations. | ⚡ Flash |
| IO39 | MTCK (GPIO39) | Default JTAG debugging TCK pin. If JTAG is needed, this pin must be free; it may also be used internally for PSRAM chip select on certain modules, so avoid repurposing it. | 🪛 Other |
| IO40 | MTDO (GPIO40) | Default JTAG TDO output for debugging. Using it as GPIO will interfere with JTAG debugging functionality. | 🪛 Other |
| IO41 | MTDI (GPIO41) | Default JTAG TDI input for debugging. Should be reserved for JTAG or left unused if JTAG is to remain available. | 🪛 Other |
| IO42 | MTMS (GPIO42) | Default JTAG TMS signal for debugging. Using this pin for other purposes will disable the JTAG interface (unless JTAG is rerouted to USB). | 🪛 Other |
| IO45 | GPIO45 | Determines flash/PSRAM power voltage (3.3 V vs 1.8 V) at boot. Must match hardware configuration; using as GPIO can upset flash supply setting. | 🛠️ Strapping |
📌 Key Takeaway:
- Before using any GPIO, check if it is assigned a critical function.
- Avoid using bootstrapping pins unless you're modifying boot behavior intentionally.
- If JTAG debugging is needed, ensure its pins remain free.
- USB and Flash-related GPIOs should remain dedicated unless you disable their default functions.
✅ Pins Safe to use
- 🔹 IO1
- 🔹 IO2
- 🔹 IO4
- 🔹 IO5
- 🔹 IO6
- 🔹 IO7
- 🔹 IO8
- 🔹 IO15
- 🔹 IO16
- 🔹 IO17
- 🔹 IO18
Unlike restricted pins, these GPIOs are not tied to essential system functions like 🛠️ bootstrapping, 🔌 USB communication, 🔗 JTAG debugging, or ⚡ SPI flash memory, making them the best choices for custom applications and general use.
Why Are These Pins Safe?- Not involved in bootstrapping → These GPIOs do not affect the device’s boot mode or system startup.
- Not linked to flash memory or PSRAM → They won’t interfere with storage or memory access.
- Not dedicated to USB or JTAG → They remain free for general use without affecting debugging or programming.
- No special hardware connections → Unlike some pins that are internally wired to system functions, these remain freely assignable.
🗺️ ESP32-S3-Zero External Pins Mapping Functions
Below you can find the ESP32-S3-Zero pinout. This development board provides 24 digital IO pins, out of which 24 can be used as an external interrupt pins , 2 as analog input pins and 24 pins have Pulse-Width Modulation (PWM) .
| Pin | Function | ESP Pin | Input/Output | Description |
|---|---|---|---|---|
| 1 | 5V | 5V | POWER INPUT | 5V power input for the board |
| 2 | GND | GND | POWER GROUND | Ground connection |
| 3 | 3V3 | 3.3V | POWER OUTPUT | 3.3V power output |
| 5 | IO1 | IO1 | BIDIRECTIONAL | GPIO, ADC |
| 6 | IO2 | IO2 | BIDIRECTIONAL | GPIO, ADC |
| 7 | IO3 | IO3 | BIDIRECTIONAL | GPIO, ADC |
| 8 | IO4 | IO4 | BIDIRECTIONAL | GPIO, ADC |
| 9 | IO5 | IO5 | BIDIRECTIONAL | GPIO, ADC |
| 10 | IO6 | IO6 | BIDIRECTIONAL | GPIO, ADC |
| 11 | IO7 | IO7 | BIDIRECTIONAL | GPIO, ADC |
| 12 | IO8 | IO8 | BIDIRECTIONAL | GPIO, ADC |
| 13 | IO9 | IO9 | BIDIRECTIONAL | GPIO, ADC |
| 14 | IO10 | IO10 | BIDIRECTIONAL | GPIO, ADC |
| 15 | IO11 | IO10 | BIDIRECTIONAL | GPIO, ADC |
| 16 | IO12 | IO10 | BIDIRECTIONAL | GPIO, ADC |
| 17 | IO13 | IO10 | BIDIRECTIONAL | GPIO, ADC |
| 18 | IO14 | IO10 | BIDIRECTIONAL | GPIO, ADC |
| 19 | IO15 | IO10 | BIDIRECTIONAL | GPIO, ADC |
| 20 | IO16 | IO10 | BIDIRECTIONAL | GPIO, ADC |
| 21 | IO17 | IO10 | BIDIRECTIONAL | GPIO, ADC |
| 22 | IO18 | IO10 | BIDIRECTIONAL | GPIO, ADC |
| 23 | IO38 | IO10 | BIDIRECTIONAL | GPIO |
| 24 | IO39 | IO10 | BIDIRECTIONAL | GPIO |
| 25 | IO40 | IO10 | BIDIRECTIONAL | GPIO |
| 26 | IO41 | IO10 | BIDIRECTIONAL | GPIO |
| 27 | IO42 | IO10 | BIDIRECTIONAL | GPIO |
| 28 | IO45 | IO10 | BIDIRECTIONAL | GPIO |
🛠️ Default Tools
| Bootloader tool | esptool_py |
| Uploader tool | esptool_py |
| Network uploader tool | esp_ota |
| Bootloader address | 0x0 |
| Flash mode | qio |
| Boot mode | qio |
| PSRAM type | |
| Maximum upload size | 4096 Kb (4194304 B) |
| Maximum data size | 512 Kb (524288 B) |
The ESP32-S3-Zero development board by default uses esptool_py uploader tool, esp_ota network uploader tool for Over-the-air (OTA) uploads and esptool_py bootloader tool. The bootloader starts at address "0x0". Flash mode and boot mode for ESP32-S3-Zero development board by default is qio and qio respectively.
