LilyGo T-Display-S3 AMOLED Development Board Pinout and Technical Specifications
Code name: LILYGO_T_DISPLAY_S3
Manufacturer: LilyGo
LilyGo T-Display-S3 AMOLED development board is based on esp32s3 microcontroller and uses xtensa architecture. This development board has a maximum CPU frequency of 240 MHz and a flash size of 16MB.
π Price
π LilyGo T-Display-S3 AMOLED Description
π The LilyGo T-Display-S3 AMOLED is a cutting-edge development board featuring an ESP32-S3 chip with integrated WiFi and Bluetooth 5 capabilities. It boasts a 1.91-inch AMOLED display with a resolution of 536x240 pixels, driven by an RM67162 controller, offering vibrant visuals for embedded applications. β‘
π‘ With support for WiFi 802.11 b/g/n and Bluetooth 5 (LE), it ensures seamless wireless connectivity for IoT projects. The board is equipped with 8MB PSRAM and 16MB Flash memory, providing ample storage and performance.
πΎ Designed with multiple GPIOs, PWM, ADC, I2C, and SPI support, it is suitable for various applications, including sensor interfacing, graphical user interfaces, and wireless communication.
π LilyGo T-Display-S3 AMOLED Specs
Below you can find the specifications of LilyGo T-Display-S3 AMOLED, such as features, connectivity options, and LilyGo T-Display-S3 AMOLED technical specs.
β¨ Features
- 48 digital IO pins
- 46 external interrupt pins
- 20 analog input pins
- 27 PWM pins
π₯ Display
- Type: AMOLED
- Size: 1.91"
- Resolution: 536x240
π₯οΈ Display
- Type: AMOLED
- Size: 1.91"
- Resolution: 536x240
π°οΈ Connectivity
- WiFi: 802.11 b/g/n (2.4 GHz)
- Bluetooth: 5.0
- BLE: 5.0
π Technical specs
Microcontroller | esp32s3 |
Clock Speed | 240 MHz |
Flash size | 16MB |
PSRAM Size | 8MB |
Architecture | xtensa |
π LilyGo T-Display-S3 AMOLED Pinout
The LilyGo T-Display-S3 AMOLED pinout offers a variety of digital and analog pins, along with a dedicated display interface. Key pins include:
5V
and 3.3V
power rails for stable operation.
SDA
and SCL
for I2C, MISO
, MOSI
, SCK
, and SS
for SPI communication.
Additionally, dedicated LCD pins ensure efficient display control.
β οΈ Pins to Avoid or Use with Caution
Some pins are reserved for critical functions like bootstrapping, JTAG debugging, USB communication, and flash memory operations. Misusing these pins may lead to boot failures, programming issues, USB conflicts, or disruptions in flash storage. Below is a list of pins to avoid or use with caution, categorized for clarity:
- π οΈ Strapping Pins (Boot Mode & System Behavior) - These pins control boot behavior and flash voltage selection. Pulling them high or low at reset can impact boot mode selection, voltage settings, or debugging access. Avoid altering their state unless necessary.
- π JTAG Debugging Pins - JTAG is used for low-level debugging and programming. If JTAG is enabled, these pins must remain dedicated to it. Repurposing them as GPIO can disable JTAG debugging features.
- π USB Communication Pins - These pins are used for USB Serial/JTAG communication. If USB debugging or communication is required, they should not be reassigned as GPIO.
- β‘ Flash Memory & SPI Pins - Certain GPIOs are hardwired to SPI flash memory and PSRAM. Using them as standard GPIOs may result in system instability, corrupted storage, or boot failure.
- π‘ UART Serial Communication Pins - By default, these pins are used for serial debugging, console output, and firmware uploads. Repurposing them for general I/O may break UART programming or debugging capabilities.
PIN | Label | Reason | Function |
---|---|---|---|
IO0 | GPIO0 | Must be pulled high (default) or low (to enter UART download mode) at reset. Using it for other functions can interfere with boot mode configuration. | π οΈ Strapping |
IO3 | GPIO3 | Sampled at reset to select JTAG interface (USB Serial/JTAG controller vs. external pins). Improper use can disable external JTAG or alter debug interface. | π οΈ Strapping |
IO9 | FSPIHD | Connected to external flash (data/hold signal) on most modules. Not recommended for use as GPIO, since it must remain dedicated to flash communication. | β‘ Flash |
IO10 | FSPICS0 | Used to select the external flash chip. It is required for flash access and cannot be repurposed without losing flash connectivity | β‘ Flash |
IO11 | FSPID | Used as a data line for flash (and in-package PSRAM). It should not be used as GPIO when the flash/PSRAM is in use. | β‘ Flash |
IO12 | FSPICLK | Drives the flash (and PSRAM) clock. This critical signal must be reserved for memory and not used as general GPIO. | β‘ Flash |
IO13 | FSPIQ | Used as a data line for flash/PSRAM transfers. Not available for other uses when flash/PSRAM is connected. | β‘ Flash |
IO14 | FSPIWP | Connected to external flash (data/write-protect signal). Not recommended as GPIO because itβs reserved for flash operations. | β‘ Flash |
IO38 | FSPIWP | On flash-equipped chips, this pin is tied to the flashβs WP# (or D3) line. It should be avoided for other use, as itβs needed for flash operations. | β‘ Flash |
IO39 | MTCK (GPIO39) | Default JTAG debugging TCK pin. If JTAG is needed, this pin must be free; it may also be used internally for PSRAM chip select on certain modules, so avoid repurposing it. | πͺ Other |
IO40 | MTDO (GPIO40) | Default JTAG TDO output for debugging. Using it as GPIO will interfere with JTAG debugging functionality. | πͺ Other |
IO41 | MTDI (GPIO41) | Default JTAG TDI input for debugging. Should be reserved for JTAG or left unused if JTAG is to remain available. | πͺ Other |
IO42 | MTMS (GPIO42) | Default JTAG TMS signal for debugging. Using this pin for other purposes will disable the JTAG interface (unless JTAG is rerouted to USB). | πͺ Other |
IO43 | U0TXD (GPIO43) | Used for bootloader output and UART console logs. If repurposed, you will lose the default serial output (and programming via UART0). | πͺ Other |
IO44 | U0RXD (GPIO44) | Used for bootloader input (download mode via serial). If repurposed, you cannot use the default UART0 download mode for programming the chip. | πͺ Other |
IO45 | GPIO45 | Determines flash/PSRAM power voltage (3.3 V vs 1.8 V) at boot. Must match hardware configuration; using as GPIO can upset flash supply setting. | π οΈ Strapping |
IO46 | GPIO46 | Must be at a defined level during reset (with GPIO0) to select normal or download boot and UART/USB print mode. This pin is input-only (no output drive), so it should be left for its intended strapping function. | π οΈ Strapping |
IO47 | SPICLK_P | Used only on variants with Octal SPI interface (e.g. ESP32-S3R16V) as part of the differential clock pair. On such chips it operates at 1.8 V and is reserved for the high-speed octal SPI clock, not for general GPIO use. | β‘ Flash |
IO48 | SPICLK_N | Used only on variants with Octal SPI interface, as the negative leg of the differential clock&. On such chips it operates at 1.8 V; it should be avoided for GPIO to prevent conflicts with the octal flash/PSRAM clock. | β‘ Flash |
π Key Takeaway:
- Before using any GPIO, check if it is assigned a critical function.
- Avoid using bootstrapping pins unless you're modifying boot behavior intentionally.
- If JTAG debugging is needed, ensure its pins remain free.
- USB and Flash-related GPIOs should remain dedicated unless you disable their default functions.
β Pins Safe to use
- πΉ IO1
- πΉ IO2
- πΉ IO4
- πΉ IO5
- πΉ IO6
- πΉ IO7
- πΉ IO8
- πΉ IO15
- πΉ IO16
- πΉ IO17
- πΉ IO18
- πΉ IO21
Unlike restricted pins, these GPIOs are not tied to essential system functions like π οΈ bootstrapping, π USB communication, π JTAG debugging, or β‘ SPI flash memory, making them the best choices for custom applications and general use.
Why Are These Pins Safe?- Not involved in bootstrapping β These GPIOs do not affect the deviceβs boot mode or system startup.
- Not linked to flash memory or PSRAM β They wonβt interfere with storage or memory access.
- Not dedicated to USB or JTAG β They remain free for general use without affecting debugging or programming.
- No special hardware connections β Unlike some pins that are internally wired to system functions, these remain freely assignable.
πΊοΈ LilyGo T-Display-S3 AMOLED External Pins Mapping Functions
Below you can find the LilyGo T-Display-S3 AMOLED pinout. This development board provides 48 digital IO pins, out of which 46 can be used as an external interrupt pins , 20 as analog input pins and 27 pins have Pulse-Width Modulation (PWM) .
Pin | Function | ESP Pin | Input/Output | Description |
---|---|---|---|---|
1 | 3V3 | 3.3V | POWER OUTPUT | 3.3V power output |
2 | GND | GND | POWER GROUND | Ground connection |
3 | 5V | 5V | POWER INPUT | 5V power input for the board |
4 | IO0 | A0 | BIDIRECTIONAL | GPIO, ADC pin, Touch, PWM |
5 | IO1 | A1 | BIDIRECTIONAL | GPIO, ADC pin, Touch, PWM |
6 | IO2 | A2 | BIDIRECTIONAL | GPIO, ADC pin, Touch, PWM |
7 | IO3 | A3 | BIDIRECTIONAL | GPIO, ADC pin, Touch, PWM |
8 | IO4 | BAT_VOLT | INPUT | GPIO, Battery Voltage Sense, PWM |
9 | IO5 | LCD_RES | OUTPUT | GPIO, LCD Reset, PWM |
10 | IO6 | LCD_CS | OUTPUT | GPIO, LCD Chip Select, PWM |
11 | IO7 | LCD_DC | OUTPUT | GPIO, LCD Data/Command, PWM |
12 | IO8 | LCD_WR | OUTPUT | GPIO, LCD Write, PWM |
13 | IO9 | LCD_RD | OUTPUT | GPIO, LCD Read, PWM |
14 | IO10 | SS | BIDIRECTIONAL | GPIO, SPI Slave Select, ADC pin, Touch, PWM |
15 | IO11 | MOSI | BIDIRECTIONAL | GPIO, SPI Master Out Slave In, ADC pin, Touch, PWM |
16 | IO12 | SCK | BIDIRECTIONAL | GPIO, SPI Clock, ADC pin, Touch, PWM |
17 | IO13 | MISO | BIDIRECTIONAL | GPIO, SPI Master In Slave Out, ADC pin, Touch, PWM |
18 | IO14 | BUTTON_2 | INPUT | GPIO, User Button, PWM |
19 | IO15 | LCD_POWER_ON | OUTPUT | GPIO, LCD Power Enable, PWM |
20 | IO16 | TP_INIT | BIDIRECTIONAL | GPIO, ADC pin, PWM |
21 | IO17 | SCL | BIDIRECTIONAL | GPIO, I2C Clock, ADC pin, PWM |
22 | IO18 | SDA | BIDIRECTIONAL | GPIO, I2C Data, ADC pin, PWM |
23 | IO21 | TP_RESET | BIDIRECTIONAL | GPIO, PWM |
24 | IO38 | LCD_BL | OUTPUT | GPIO, LCD Backlight, PWM |
25 | IO39 | LCD_D0 | OUTPUT | GPIO, LCD Data 0, PWM |
26 | IO40 | LCD_D1 | OUTPUT | GPIO, LCD Data 1, PWM |
27 | IO41 | LCD_D2 | OUTPUT | GPIO, LCD Data 2, PWM |
28 | IO42 | LCD_D3 | OUTPUT | GPIO, LCD Data 3, PWM |
29 | IO43 | TX | BIDIRECTIONAL | GPIO, UART Transmit, PWM |
30 | IO44 | RX | BIDIRECTIONAL | GPIO, UART Receive, PWM |
31 | IO45 | LCD_D4 | OUTPUT | GPIO, LCD Data 4, PWM |
32 | IO46 | LCD_D5 | OUTPUT | GPIO, LCD Data 5, PWM |
33 | IO47 | LCD_D6 | OUTPUT | GPIO, LCD Data 6, PWM |
34 | IO48 | LCD_D7 | OUTPUT | GPIO, LCD Data 7, PWM |
πΊοΈ LilyGo T-Display-S3 AMOLED Pins Mapping Arduino IDE
Below you can find the LilyGo T-Display-S3 AMOLED pinout. This development board provides 48 digital IO pins, out of which 46 can be used as an external interrupt pins , 20 as analog input pins and 27 pins have Pulse-Width Modulation (PWM) .
Pin | Analog | Touch | PWM | Other |
---|---|---|---|---|
0 | BUTTON_1 | |||
1 | A0 | T1 | PWM | |
2 | A1 | T2 | PWM | |
3 | A2 | T3 | PWM | |
4 | PWM | BAT_VOLT | ||
10 | A9 | T10 | PWM | SS |
11 | A10 | T11 | PWM | MOSI |
12 | A11 | T12 | PWM | SCK |
13 | A12 | T13 | PWM | MISO |
17 | A16 | PWM | SCL | |
18 | A17 | PWM | SDA | |
43 | PWM | TX | ||
44 | PWM | RX |
π οΈ Default Tools
Bootloader tool | esptool_py |
Uploader tool | esptool_py |
Network uploader tool | esp_ota |
Bootloader address | 0x0 |
Flash mode | dio |
Boot mode | qio |
PSRAM type | opi |
Maximum upload size | 3072 Kb (3145728 B) |
Maximum data size | 320 Kb (327680 B) |
The LilyGo T-Display-S3 AMOLED development board by default uses esptool_py uploader tool, esp_ota network uploader tool for Over-the-air (OTA) uploads and esptool_py bootloader tool. The bootloader starts at address "0x0". Flash mode and boot mode for LilyGo T-Display-S3 AMOLED development board by default is dio and qio respectively. The board uses opi PSRAM type. When using Arduino IDE, the maximum sketch upload size is 3072 Kb (3145728 B) and maximum data size for variables is 320 Kb (327680 B).