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LilyGo T-Display-S3 Touch Development Board Pinout and Technical Specifications

Code name: LILYGO_T_DISPLAY_S3

Manufacturer: LilyGo

LilyGo T-Display-S3 Touch development board is based on esp32s3 microcontroller and uses xtensa architecture. This development board has a maximum CPU frequency of 240 MHz and a flash size of 16MB.


πŸ”— Quick Links

LilyGo T-Display-S3 Touch imageLilyGo T-Display-S3 Touch imageLilyGo T-Display-S3 Touch imageLilyGo T-Display-S3 Touch image

πŸ›’ Price

Normally, the LilyGo T-Display-S3 Touch costs around $18 per Pcs.
The prices are subject to change. Check current price:
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πŸ“ LilyGo T-Display-S3 Touch Description

πŸš€ The LilyGo T-Display-S3 is a powerful development board featuring an ESP32-S3 chip with integrated WiFi and Bluetooth 5 capabilities. Equipped with a 1.9-inch LCD (270x320) driven by an ST7789V controller, it provides a vibrant display for embedded applications. ⚑

πŸ“‘ With WiFi 802.11 b/g/n and Bluetooth 5 (LE), it offers seamless wireless connectivity for IoT projects. Its 8MB PSRAM and 16MB Flash memory ensure ample storage and performance.

πŸ’Ύ Designed with multiple GPIOs, PWM, ADC, I2C, and SPI support, it is suitable for various applications, including sensor interfacing, graphical user interfaces, and wireless communication.

πŸ“Š LilyGo T-Display-S3 Touch Specs

Below you can find the specifications of LilyGo T-Display-S3 Touch, such as features, connectivity options, and LilyGo T-Display-S3 Touch technical specs.

✨ Features

  • 13 digital IO pins
  • 13 external interrupt pins
  • 10 analog input pins
  • 13 PWM pins

πŸ–₯ Display

  • Type: LCD
  • Size: 1.9"
  • Resolution: 170x320

πŸ–₯️ Display

  • Type: LCD
  • Size: 1.9"
  • Resolution: 170x320

πŸ›°οΈ Connectivity

  • WiFi: 802.11 b/g/n (2.4 GHz)
  • Bluetooth: 5.0
  • BLE: 5.0

πŸ“ Technical specs

Microcontrolleresp32s3
Clock Speed240 MHz
Flash size16MB
PSRAM Size8MB
Architecturextensa

πŸ”Œ LilyGo T-Display-S3 Touch Pinout

The LilyGo T-Display-S3 pinout provides various digital and analog pins, along with a dedicated display interface. Key pins include:

5V and 3.3V power rails for stable operation.

SDA and SCL for I2C, MISO, MOSI, SCK, and SS for SPI communication.

Additionally, dedicated LCD pins ensure efficient display control.

⚠️ Pins to Avoid or Use with Caution

Some pins are reserved for critical functions like bootstrapping, JTAG debugging, USB communication, and flash memory operations. Misusing these pins may lead to boot failures, programming issues, USB conflicts, or disruptions in flash storage. Below is a list of pins to avoid or use with caution, categorized for clarity:

PINLabelReasonFunction
IO3GPIO3Sampled at reset to select JTAG interface (USB Serial/JTAG controller vs. external pins). Improper use can disable external JTAG or alter debug interface.πŸ› οΈ Strapping
IO10FSPICS0Used to select the external flash chip. It is required for flash access and cannot be repurposed without losing flash connectivity⚑ Flash
IO11FSPIDUsed as a data line for flash (and in-package PSRAM). It should not be used as GPIO when the flash/PSRAM is in use.⚑ Flash
IO12FSPICLKDrives the flash (and PSRAM) clock. This critical signal must be reserved for memory and not used as general GPIO.⚑ Flash
IO13FSPIQUsed as a data line for flash/PSRAM transfers. Not available for other uses when flash/PSRAM is connected.⚑ Flash
IO43U0TXD (GPIO43)Used for bootloader output and UART console logs. If repurposed, you will lose the default serial output (and programming via UART0).πŸͺ› Other
IO44U0RXD (GPIO44)Used for bootloader input (download mode via serial). If repurposed, you cannot use the default UART0 download mode for programming the chip.πŸͺ› Other
IO38FSPIWPOn flash-equipped chips, this pin is tied to the flash’s WP# (or D3) line. It should be avoided for other use, as it’s needed for flash operations.⚑ Flash
IO39MTCK (GPIO39)Default JTAG debugging TCK pin. If JTAG is needed, this pin must be free; it may also be used internally for PSRAM chip select on certain modules, so avoid repurposing it.πŸͺ› Other
IO40MTDO (GPIO40)Default JTAG TDO output for debugging. Using it as GPIO will interfere with JTAG debugging functionality.πŸͺ› Other
IO41MTDI (GPIO41)Default JTAG TDI input for debugging. Should be reserved for JTAG or left unused if JTAG is to remain available.πŸͺ› Other
IO42MTMS (GPIO42)Default JTAG TMS signal for debugging. Using this pin for other purposes will disable the JTAG interface (unless JTAG is rerouted to USB).πŸͺ› Other
IO45GPIO45Determines flash/PSRAM power voltage (3.3 V vs 1.8 V) at boot. Must match hardware configuration; using as GPIO can upset flash supply setting.πŸ› οΈ Strapping
IO46GPIO46Must be at a defined level during reset (with GPIO0) to select normal or download boot and UART/USB print mode. This pin is input-only (no output drive), so it should be left for its intended strapping function.πŸ› οΈ Strapping
IO47SPICLK_PUsed only on variants with Octal SPI interface (e.g. ESP32-S3R16V) as part of the differential clock pair. On such chips it operates at 1.8 V and is reserved for the high-speed octal SPI clock, not for general GPIO use.⚑ Flash
IO48SPICLK_NUsed only on variants with Octal SPI interface, as the negative leg of the differential clock&. On such chips it operates at 1.8 V; it should be avoided for GPIO to prevent conflicts with the octal flash/PSRAM clock.⚑ Flash
IO9FSPIHDConnected to external flash (data/hold signal) on most modules. Not recommended for use as GPIO, since it must remain dedicated to flash communication.⚑ Flash
IO14FSPIWPConnected to external flash (data/write-protect signal). Not recommended as GPIO because it’s reserved for flash operations.⚑ Flash

πŸ“Œ Key Takeaway:

βœ… Pins Safe to use

For general GPIO usage, these are the safest and most flexible choices πŸš€:
  • πŸ”Ή IO1
  • πŸ”Ή IO2
  • πŸ”Ή IO16
  • πŸ”Ή IO17
  • πŸ”Ή IO18
  • πŸ”Ή IO21
  • πŸ”Ή IO5
  • πŸ”Ή IO6
  • πŸ”Ή IO7
  • πŸ”Ή IO8
  • πŸ”Ή IO15
  • πŸ”Ή IO4

Unlike restricted pins, these GPIOs are not tied to essential system functions like πŸ› οΈ bootstrapping, πŸ”Œ USB communication, πŸ”— JTAG debugging, or ⚑ SPI flash memory, making them the best choices for custom applications and general use.

Why Are These Pins Safe?
  • Not involved in bootstrapping β†’ These GPIOs do not affect the device’s boot mode or system startup.
  • Not linked to flash memory or PSRAM β†’ They won’t interfere with storage or memory access.
  • Not dedicated to USB or JTAG β†’ They remain free for general use without affecting debugging or programming.
  • No special hardware connections β†’ Unlike some pins that are internally wired to system functions, these remain freely assignable.

πŸ—ΊοΈ LilyGo T-Display-S3 Touch External Pins Mapping Functions

Below you can find the LilyGo T-Display-S3 Touch pinout. This development board provides 13 digital IO pins, out of which 13 can be used as an external interrupt pins , 10 as analog input pins and 13 pins have Pulse-Width Modulation (PWM) .

PinFunctionESP PinInput/OutputDescription
13V33.3VPOWER OUTPUT3.3V power output
2GNDGNDPOWER GROUNDGround connection
35V5VPOWER INPUT5V power input for the board
5IO1IO1BIDIRECTIONALGPIO, Touch, ADC
6IO2IO2BIDIRECTIONALGPIO, Touch, ADC
7IO3IO3BIDIRECTIONALGPIO, Touch, ADC
8IO10SPI_CSBIDIRECTIONALGPIO, SPI Chip Select
9IO11SPI_DBIDIRECTIONALGPIO, SPI Data
10IO12SPI_CLKBIDIRECTIONALGPIO, SPI Clock
11IO13SPI_QBIDIRECTIONALGPIO, SPI Q
12IO16ADC2_CH5BIDIRECTIONALGPIO, ADC
13IO17U1_TXDBIDIRECTIONALGPIO, UART TX
14IO18U1_RXDBIDIRECTIONALGPIO, UART RX
15IO21IO21BIDIRECTIONALGPIO
16IO43CLK_OUT1OUTPUTGPIO, Clock Output 1
17IO44CLK_OUT2OUTPUTGPIO, Clock Output 2
18IO38LCD_BLOUTPUTGPIO, LCD BL
19IO39LCD_D0OUTPUTGPIO, LCD Data 0
20IO40LCD_D1OUTPUTGPIO, LCD Data 1
21IO41LCD_D2OUTPUTGPIO, LCD Data 2
22IO42LCD_D3OUTPUTGPIO, LCD Data 3
23IO45LCD_D4OUTPUTGPIO, LCD Data 4
24IO46LCD_D5OUTPUTGPIO, LCD Data 5
25IO47LCD_D6OUTPUTGPIO, LCD Data 6
26IO48LCD_D7OUTPUTGPIO, LCD Data 7
27IO5LCD_RESOUTPUTGPIO, LCD Reset
28IO6LCD_CSOUTPUTGPIO, LCD Chip Select
29IO7LCD_DCOUTPUTGPIO, LCD Data/Command
30IO8LCD_WROUTPUTGPIO, LCD Write
31IO9LCD_RDOUTPUTGPIO, LCD Read
32IO15LCD_POWER_ONOUTPUTGPIO, LCD Power Enable
33IO4LCD_BAT_VOLTINPUTGPIO, Battery Voltage Sense
34IO14BUTTONINPUTButton
Function - Pin Function
ESP Pin - Pin on ESP32
Input/Output - Input or Output Pin
Description - Pin Description

πŸ—ΊοΈ LilyGo T-Display-S3 Touch Pins Mapping Arduino IDE

Below you can find the LilyGo T-Display-S3 Touch pinout. This development board provides 13 digital IO pins, out of which 13 can be used as an external interrupt pins , 10 as analog input pins and 13 pins have Pulse-Width Modulation (PWM) .

PinAnalogTouchPWMOther
0BUTTON_1
1A0T1PWM
2A1T2PWM
3A2T3PWM
4PWMBAT_VOLT
10A9T10PWMSS
11A10T11PWMMOSI
12A11T12PWMSCK
13A12T13PWMMISO
17A16PWMSCL
18A17PWMSDA
43PWMTX
44PWMRX
Analog - Analog input pins
Touch - Touch pins
Function - Function pins
RX / TX - Receive (RX) / Transmit (TX)
LED_BUILTIN - Built-in LED
PWM - Pulse-Width Modulation

πŸ› οΈ Default Tools

Bootloader toolesptool_py
Uploader toolesptool_py
Network uploader toolesp_ota
Bootloader address0x0
Flash modedio
Boot modeqio
PSRAM typeopi
Maximum upload size
3072 Kb
(3145728 B)
Maximum data size
320 Kb
(327680 B)

The LilyGo T-Display-S3 Touch development board by default uses esptool_py uploader tool, esp_ota network uploader tool for Over-the-air (OTA) uploads and esptool_py bootloader tool. The bootloader starts at address "0x0". Flash mode and boot mode for LilyGo T-Display-S3 Touch development board by default is dio and qio respectively. The board uses opi PSRAM type. When using Arduino IDE, the maximum sketch upload size is 3072 Kb (3145728 B) and maximum data size for variables is 320 Kb (327680 B).