LilyGo T3S3 V1.0 Development Board Pinout and Technical Specifications
Code name: LILYGO_T3S3_V1_0
Manufacturer: LilyGo
LilyGo T3S3 V1.0 development board is based on esp32s3 microcontroller and uses xtensa architecture. This development board has a maximum CPU frequency of 240 MHz and a flash size of 16MB.
🔗 Quick Links
📝 LilyGo T3S3 V1.0 Description
🚀 The LilyGo T3S3 V1.0 is an ESP32-S3-based development board designed for high-performance applications. With integrated WiFi and Bluetooth 5, it offers seamless wireless connectivity for IoT projects. ⚡
📡 Featuring a compact design, the T3S3 V1.0 is equipped with 8MB PSRAM and 16MB Flash, ensuring sufficient storage and processing power for complex tasks.
💾 The board includes multiple GPIOs, ADC, PWM, I2C, and SPI support, making it suitable for a wide range of embedded applications.
📊 LilyGo T3S3 V1.0 Specs
Below you can find the specifications of LilyGo T3S3 V1.0, such as features, connectivity options, and LilyGo T3S3 V1.0 technical specs.
✨ Features
- 48 digital IO pins
- 46 external interrupt pins
- 20 analog input pins
- 27 PWM pins
🖥 Display
- Type: OLED
- Size: 0.96"
- Resolution: 128x64
🖥️ Display
- Type: OLED
- Size: 0.96"
- Resolution: 128x64
🛰️ Connectivity
- WiFi: 802.11 b/g/n (2.4 GHz)
- Bluetooth: 5.0
- BLE: 5.0
📐 Technical specs
| Microcontroller | esp32s3 |
| Clock Speed | 240 MHz |
| Flash size | 16MB |
| PSRAM Size | 8MB |
| Architecture | xtensa |
🔌 LilyGo T3S3 V1.0 Pinout
⚠️ Pins to Avoid or Use with Caution
Some pins are reserved for critical functions like bootstrapping, JTAG debugging, USB communication, and flash memory operations. Misusing these pins may lead to boot failures, programming issues, USB conflicts, or disruptions in flash storage. Below is a list of pins to avoid or use with caution, categorized for clarity:
- 🛠️ Strapping Pins (Boot Mode & System Behavior) - These pins control boot behavior and flash voltage selection. Pulling them high or low at reset can impact boot mode selection, voltage settings, or debugging access. Avoid altering their state unless necessary.
- 🔗 JTAG Debugging Pins - JTAG is used for low-level debugging and programming. If JTAG is enabled, these pins must remain dedicated to it. Repurposing them as GPIO can disable JTAG debugging features.
- 🔌 USB Communication Pins - These pins are used for USB Serial/JTAG communication. If USB debugging or communication is required, they should not be reassigned as GPIO.
- ⚡ Flash Memory & SPI Pins - Certain GPIOs are hardwired to SPI flash memory and PSRAM. Using them as standard GPIOs may result in system instability, corrupted storage, or boot failure.
- 📡 UART Serial Communication Pins - By default, these pins are used for serial debugging, console output, and firmware uploads. Repurposing them for general I/O may break UART programming or debugging capabilities.
| PIN | Label | Reason | Function |
|---|---|---|---|
| IO3 | GPIO3 | Sampled at reset to select JTAG interface (USB Serial/JTAG controller vs. external pins). Improper use can disable external JTAG or alter debug interface. | 🛠️ Strapping |
| IO10 | FSPICS0 | Used to select the external flash chip. It is required for flash access and cannot be repurposed without losing flash connectivity | ⚡ Flash |
| IO11 | FSPID | Used as a data line for flash (and in-package PSRAM). It should not be used as GPIO when the flash/PSRAM is in use. | ⚡ Flash |
| IO12 | FSPICLK | Drives the flash (and PSRAM) clock. This critical signal must be reserved for memory and not used as general GPIO. | ⚡ Flash |
| IO13 | FSPIQ | Used as a data line for flash/PSRAM transfers. Not available for other uses when flash/PSRAM is connected. | ⚡ Flash |
| IO19 | USB_D- | By default connected to the on-chip USB Serial/JTAG controller. Using it as general GPIO without reconfiguring IO MUX will interfere with USB functionality. | 🔌 USB |
📌 Key Takeaway:
- Before using any GPIO, check if it is assigned a critical function.
- Avoid using bootstrapping pins unless you're modifying boot behavior intentionally.
- If JTAG debugging is needed, ensure its pins remain free.
- USB and Flash-related GPIOs should remain dedicated unless you disable their default functions.
✅ Pins Safe to use
- 🔹 IO1
- 🔹 IO2
- 🔹 IO16
- 🔹 IO17
- 🔹 IO18
Unlike restricted pins, these GPIOs are not tied to essential system functions like 🛠️ bootstrapping, 🔌 USB communication, 🔗 JTAG debugging, or ⚡ SPI flash memory, making them the best choices for custom applications and general use.
Why Are These Pins Safe?- Not involved in bootstrapping → These GPIOs do not affect the device’s boot mode or system startup.
- Not linked to flash memory or PSRAM → They won’t interfere with storage or memory access.
- Not dedicated to USB or JTAG → They remain free for general use without affecting debugging or programming.
- No special hardware connections → Unlike some pins that are internally wired to system functions, these remain freely assignable.
🗺️ LilyGo T3S3 V1.0 External Pins Mapping Functions
Below you can find the LilyGo T3S3 V1.0 pinout. This development board provides 48 digital IO pins, out of which 46 can be used as an external interrupt pins , 20 as analog input pins and 27 pins have Pulse-Width Modulation (PWM) .
| Pin | Function | ESP Pin | Input/Output | Description |
|---|---|---|---|---|
| 1 | 3V3 | 3.3V | POWER OUTPUT | 3.3V power output |
| 2 | GND | GND | POWER GROUND | Ground connection |
| 3 | 5V | 5V | POWER INPUT | 5V power input |
| 4 | IO1 | GPIO1 | BIDIRECTIONAL | GPIO, ADC, I2C |
| 5 | IO2 | GPIO2 | BIDIRECTIONAL | GPIO, ADC |
| 6 | IO3 | GPIO3 | BIDIRECTIONAL | GPIO, ADC |
| 7 | IO10 | SPI_CS | BIDIRECTIONAL | GPIO, SPI Chip Select |
| 8 | IO11 | SPI_D | BIDIRECTIONAL | GPIO, SPI Data |
| 9 | IO12 | SPI_CLK | BIDIRECTIONAL | GPIO, SPI Clock |
| 10 | IO13 | SPI_Q | BIDIRECTIONAL | GPIO, SPI Q |
| 11 | IO16 | I2C_SCL | BIDIRECTIONAL | GPIO, I2C Clock |
| 12 | IO17 | I2C_SDA | BIDIRECTIONAL | GPIO, I2C Data |
| 13 | IO18 | UART_TX | BIDIRECTIONAL | GPIO, UART TX |
| 14 | IO19 | UART_RX | BIDIRECTIONAL | GPIO, UART RX |
🛠️ Default Tools
| Bootloader tool | esptool_py |
| Uploader tool | esptool_py |
| Network uploader tool | esp_ota |
| Bootloader address | 0x0 |
| Flash mode | dio |
| Boot mode | qio |
| PSRAM type | opi |
| Maximum upload size | 3072 Kb (3145728 B) |
| Maximum data size | 320 Kb (327680 B) |
The LilyGo T3S3 V1.0 development board by default uses esptool_py uploader tool, esp_ota network uploader tool for Over-the-air (OTA) uploads and esptool_py bootloader tool. The bootloader starts at address "0x0". Flash mode and boot mode for LilyGo T3S3 V1.0 development board by default is dio and qio respectively. The board uses opi PSRAM type. When using Arduino IDE, the maximum sketch upload size is 3072 Kb (3145728 B) and maximum data size for variables is 320 Kb (327680 B).
